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The GBZ80 (Sharp SM83) is the CPU that powers the original Nintendo Gameboy and Gameboy Color handheld consoles. It is kind of an in-between the [[Intel 8080]] and [[Z80]]. [https://gbdev.io/resources.html Awesome Gameboy resources] [https://gbdev.gg8.se/wiki/ GBDev wiki] [https://emudev.de/ Emudev (q00.gb)]

The GBZ80 lacks the alternate register set, the dedicated I/O bus, the R register(thus no M1), the index registers (thus no DD and FD prefixed opcodes), the ED prefixed opcodes (including block transfer), the sign and parity/overflow flags (and all conditional instructions that used them), the undocumented flags (thus no leaking of WZ and Q internal registers). [https://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html GBZ80 opcodes]

The Nintendo documentation does not mention M-cycles or T-states at all. They only mention CPU cycles, which are always equal to 4 T-states (like NOPs in the CPC world). Also, the GBZ80 has different timings than the Z80. For example, :* CALL nn takes 6 cycles on the GBZ80, but only 5 NOPs on the Z80* ADD HL,ss takes 2 cycles on the GBZ80, but 3 NOPs on the Z80* JP cc,nn has different timings depending on whether the jump is taken. This is not the case on Z80.

Fun factFlags can differ too: Way more * RLCA, RRCA, RLA, RRA clear ZF in the GBZ80 cores were produced for Gameboy hardware (118 million Gameboys and 81 million GBA) than all , but not in the Z80 chips produced for home computers and game consoles. [https://www.chibiakumas.com/z80/Gameboy.php Learn * DAA clears HF in the GBZ80 Assembly Programming with ChibiAkumas], but not in the Z80

Fun fact: Way more GBZ80 cores were produced for Gameboy hardware (118 million Gameboys and 81 million GBA) than all the Z80 chips produced for home computers and game consoles. <br> == RegistersRegister File ==

| cp r daa || 10111rrr 00100111 || 1 || rowspan=3|+ || rowspan=3- |1 |0 | rowspan=3|+ X || rowspantmp :=3|a,if nf: if hf or [a and 0x0f > 9]: tmp -= 0x06 if cf or [a > 0x99]: tmp -= 0x60else: if hf or [a and 0x0f > 9]: tmp + || = 0x06 if cf or [a > 0x99]: tmp += 0x60 tmp => flags, cf := cf or [a - r > 0x99], a := tmp||rowspanDecimal Adjust Accumulator|} =3== ROT group === {|Compareclass="wikitable" style="white-space: nowrap;"

| cp n rlca || 11111110 nnnnnnnn 00000111 || 2 1 || tmp rowspan=4|0 || rowspan=4|0 || rowspan=4|0 || rowspan=4|X || cf := a .7, a := [a << 1] + cf ||rowspan=4|Fast Rotate|- n| rrca || 00001111 || 1 || cf := a.0, a := [a >> 1] + [cf << 7]|-| rla || 00010111 || 1 || ocf := cf, cf := a.7, a := [a << 1] + ocf|-| rra || 00011111 || 1 || ocf := cf, cf := a.0, a := [a >> 1] + [ocf << 7]|-| rl r || CB 00010rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || ocf := cf, cf := r.7, r := [r << 1] + ocf ||rowspan=2|Rotate Left|-| rl (hl) || CB 00010110 || 4 || ocf := cf, cf := (hl).7, (hl) := [(hl) << 1] + ocf|-| rlc r || CB 00000rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || cf := r.7, r := [r << 1] + cf ||rowspan=2|Rotate Left Carry|-| rlc (hl) || CB 00000110 || 4 || cf := (hl).7, (hl) := [(hl) << 1] + cf|-| rr r || CB 00011rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || ocf := cf, cf := r.0, r := [r >> 1] + [ocf << 7] ||rowspan=2|Rotate Right|-| rr (hl) || CB 00011110 || 4 || ocf := cf, cf := (hl).0, (hl) := [(hl) >> 1] + [ocf << 7]|-| rrc r || CB 00001rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || cf := r.0, r := [r >> 1] + [cf << 7] ||rowspan=2|Rotate Right Carry|-| rrc (hl) || CB 00001110 || 4 || cf := (hl).0, (hl) := [(hl) >> 1] + [cf << 7]|-| sla r || CB 00100rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || cf := r.7, r := r << 1 ||rowspan=2|Shift Left Arithmetic|-| sla (hl) || CB 00100110 || 4 || cf := (hl).7, (hl) := (hl) << 1|-| sra r || CB 00101rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || cf := r.0, r := r >> 1, r.7 := r.6 ||rowspan=2|Shift Right Arithmetic|-| sra (hl) || CB 00101110 || 4 || cf := (hl).0, (hl) := (hl) >> 1, (hl).7 := (hl).6|-| srl r || CB 00111rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|X || cf := r.0, r := r >> 1 ||rowspan=2|Shift Right Logical|-| srl (hl) || CB 00111110 || 4 || cf := (hl).0, (hl) := (hl) >> 1|-| swap r || CB 00110rrr || 2 || rowspan=2|+ || rowspan=2|0 || rowspan=2|0 || rowspan=2|0 || r := [[r and 0x0f] << 4] + [r >> 4] ||rowspan=2|Swap nibbles|-| swap (hl) || CB 00110110 || 4 || (hl) := [[(hl) and 0x0f] << 4] + [(hl) >> 4]

=== BCD Bitwise group ===

| daa bit b,r || 00100111 CB 01bbbrrr || 1 2 || rowspan=2| + || - rowspan=2|0 | X |rowspan=2| X 1 || rowspan=2|- || tmp := a,r and [1 << b] ||rowspan=2|Test Bitif nf then|- if hf or [a | bit b,(hl) || CB 01bbb110 || 3 || tmp := (hl) and 0x0f > 9[1 << b] then tmp |-= 0x06 if cf or | res b,r || CB 10bbbrrr || 2 || rowspan=2|- || rowspan=2|- || rowspan=2|- || rowspan=2|- || r := r and ~[a > 0x991 << b] then tmp -||rowspan= 0x602|Reset Bitelse|- if hf or [a | res b,(hl) || CB 10bbb110 || 4 || (hl) := (hl) and 0x0f > 9~[1 << b] then tmp += 0x06 if cf |-| set b,r || CB 11bbbrrr || 2 || rowspan=2|- || rowspan=2|- || rowspan=2|- || rowspan=2|- || r := r or [a > 0x991 << b] then tmp +||rowspan= 0x602|Set Bitendif,|-tmp => flags| set b, cf (hl) || CB 11bbb110 || 4 || (hl) := cf (hl) or [a > 0x991 << b],hf := a.4 xor tmp.4, |-| cpl || 00101111 || 1 || - || 1 || 1 || - || a := tmp~a || Decimal Adjust AccumulatorComplement

Opcode differences with Z80 are in bold. The unused ('''—''') opcodes will lock up the Game Boy CPU when used. The asssembler assembler syntax is from the official Nintendo [https://archive.org/details/GameBoyProgManVer1.1/ Gameboy programming manual].

| 10 xx || '''STOP'''