Changes

AMRAM2

774 bytes added, 13:12, 28 December 2016
/* Technical */
Width: 25.4 mm.
Thickness: 6.7 mm.
 
With modification (old battery removed, a socket and some wires added) a CR2032 battery can be used.
== Technical ==
A15-A0: xxxx10111111xxxx
When writing data only bit 0 of the data is significant all other bits are ignored. This has been confirmed with testing.If bit 0 is 1, then AMRAM is activated and writing to it's RAM is possible. If bit is 0, then AMRAM is not activeand writing has no effect. The ROM select is decoded in the normal way: Bit 13=0 of the address and all other bits of the address are ignored.  In addition the ROM select IDs are decoded fully, there is no repeat across the 256 ROM range. The ROMs only exist in their designated slots (i.e. 1 only exists at position 1 and no others). Amram2's RAM can be written *WITHOUT* enabling the upper ROM. It is only necessary to enable writing to the AMRAM RAM using FBF0 and then to select ROM 1 or 2 as needed. Writes go to CPC RAM AND Amram2's RAM. When writing Amram2 must be enabled using FBF0 *BEFORE* selecting the page with DFxx. For fully reliable operation, use fbf0=0 then re-select rom with DFxx to ensure writing is fully disabled.
The When reading as a ROM select it is decoded in the not necessary to use port FBF0. The normal way: Bit 13=0, all other bits are ignoredROM select procedure applies.
In addition the ROM select IDs are decoded fully, there On reset or power cycle Amram2 write protect via FBF0 is no repeat accross the 256 ROM range. The ROMs only exist in their designated slots (i.e. 1 only exists at position 1 and no others)disabled.
== Pictures ==
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