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Gate Array

927 bytes added, 30 May
correction of an error relating to IC
[[File:Amstrad 40007 Gate Array.png|right|thumb|Amstrad 40007 Gate Array]]
[[File:Amstrad 40010 Gate Array.png|right|thumb|Amstrad 40010 Gate Array]]
 
Also designated as Video Gate Array (VGA, not to be confused with the IBM PC compatible graphic card spec).
== Interrupt generation ==
[https://www.grimware.org/doku.php/documentations/devices/gatearraydo=export_xhtml#interrupt.generator Source: Grimware portal (Grim)]
Interrupts on the CPC The CPU maskable interrupts are created generated by the Gate Array based on settings from the CRTC. The Gate Array has an This is done by using a 6bits internal counter R52 (and monitoring the R is for Raster) that counts from 0 to 51, incrementing after each HSYNC signalHSync and VSync signals produced by the CRTC.
On all CRTCsevery falling edge of the HSync signal, R52 interrupts always start 1µs after the end of an HSYNCGate Array will increment the counter by one. But on CRTCs 3/4When the counter reaches 52, HSYNCs occur 1µs later than on CRTCs 0/1/2. Which means that on CRTCs 3/4, interrupts start 1µs later than on CRTCs 0/1/2. This can be adjusted by using the Gate Array raise the INT signal and reset the counter. With 50Hz PAL CRTC register 3settings (one HSync every 64us) this will produce a 300Hz interrupt rate.
R52 will return to 0 and When the CPU acknowledge the Gate Array will send an interrupt request on any of these conditions:* When (eg. it exceeds 51* By setting bit4 of is going to jump to the RMR register of interrupt vector), the Gate Array to 1* At the end will reset bit5 of the 2nd HSYNC after counter, so the start of the VSYNCnext interrupt can't occur closer than 32 HSync.
When the Gate Array sends an interrupt request:*If the interrupts were authorized at the time of the requesta VSync occurs, then bit5 of R52 is cleared (but R52 was reset to 0 anyway) and the interrupt takes place*If interrupts are not authorized, then the R52 counter continues to increment and the interrupt remains armed (the Gate Array then maintains its INT signal). When interrupts are enabled (using the EI instruction), bit5 of R52 is cleared will wait for two HSync and the interrupt takes place. This happens only '''after the instruction that follows EI''' as this Z80 instruction has a 1-instruction delay.:
Note: On Amstrad Plus, * If the counter>=32 (bit5=1), then no interrupt management system request is seriously beefed upissued and counter is reset to 0. See * If the [[ASIC]] wiki pagecounter<32 (bit5=0), then an interrupt request is issued and counter is reset to 0.
<br>This 2 HSync delay after a VSync is used to let the main program, executed by the CPU, enough time to sense the VSync (for synchronisation with the display, most likely) before an interrupt service routine is eventually executed.
== CSYNC signal ==So all the interrupt timings are mostly determined by the CRTC settings. Other than that, the internal interrupt counter can be cleared anytime by software using the Gate Array RMR register.
The HSYNC and VSYNC signals are received from falling edge of the HSync trigger the counter, therefore modifying the duration of the HSync with the [[CRTC]]. These signals are then modified Register 3 can delay the interrupt requests by the Gate Array to C-HSYNC and C-VSYNC and merged into a single CSYNC signal that will few microseconds. This can be sent used to the display.adjust interrupt timings between CPC and Plus machines…
When CRTC HSYNC is activeNote: On Amstrad Plus, the Gate Array immediately outputs the palette colour blackinterrupt management system is seriously beefed up. If See the HSYNC is set to 14 characters then black will be output for 14µs[[ASIC]] wiki page.
If a graphics mode change is pending, the HSYNC pulse width needs to be at least 2µs for Gate Array to change the graphics mode=== Timings ===[https://www.grimware.org/doku.php/documentations/devices/gatearraydo=export_xhtml#interrupt.generator Source: Grimware portal (Grim)]
C-HSYNC begins 2µs after activation of The INT signal (active low) produced by the CRTC HSYNC and stays Gate Array, is a maximum short pulse of 4µs (1.4us and starts right after the falling edge of the HSync signal is cut short if HSYNC width is greater than 6(produced by the CRTC).
For example, if CRTC R2=46, and CRTC HSYNC width is 14 chars then C-HSYNC starts at 48 and lasts only until 51 included== DI in peace ===[https://acpc.me/ACME/FANZINES Source: Amslive No4 (Madram)]
On Gate Array, even if the duration of the CRTC VSYNC The GA maintains its int request until it is reduced to 2 µseconds, accepted.RST #38 occurs not after the Gate Array will always output black for 26 lines with 4 lines of C-VSYNC to the monitor. While on ASIC/Pre-ASICEI, but after the CRTC VSYNC must be active as long as instruction following the C-VSYNC signal is sent to EI (the monitor. The Gate Array (and ASIC/Pre-ASIC) uses 2 internal counters Z80 needs time to create clean up its CSYNC signal:* H06 counts act). Even if the number of CRTC characters processed during an HSYNC. H06 is incremented int isn't validated by the Gate Array for each CRTC character when CRTC HSYNC is active. The Gate Array activates the C-HSYNC signal when H06 reaches 2Z80, and changes IC (interrupt counter) continues on its graphics mode if a change was pending. It deactivates this signal when H06 reaches 6merry way.* V26 counts But after the number of HSYNCs occuring during EI, a VSYNC. V26 is incremented by test similar to the Gate Array when one seen for the CRTC signals an end of HSYNC. VBL is performed: The Gate Array activates the C-VSYNC signal when V26 reaches 2 (and if VSYNC interrupt is active on ASIC/Pre-ASIC). It deactivates this signal when V26 reaches 6. After the 26th line has been processedgenerated anyway, the Gate Array stops outputting the palette colour black.but:* If CRTC VSYNC is activated again while V26 is still in progressIC < 32, then V26 IC is reset to 0 and starts counting up again unchanged (the HSYNC pulses. The HSYNC signal from the CRTC is 0 when inactive and 1 when active. Same for VSYNC. C-HSYNC and C-VSYNC are composited using the XNOR function. The resulting CSYNC signal next int will then be produced by the Gate Array is 1 when inactive and 0 when active21 to 52 lines later). On a CPC monitor, the CSYNC * Otherwise bit 5 of IC is rendered in "absolute black"set to zero. It is darker than the palette colour black output by the Gate Array. The electron beam is basically turned off. Turning up the brightness level won't make it any brighter. <br>
== Controlling the Gate Array ==
==== ROM configuration selection ====
Bit 2 is used to enable or disable the lower ROM area. The lower ROM area occupies memory addresses &amp;0000-&amp;3fff and is used to access the operating system ROM. When the lower ROM area is is enabled, reading from &amp;0000-&amp;3FFF will return data in the ROM. When a value is written to &amp;0000-&amp;3FFF, it will be written to the RAM underneath the RAMROM. When it is disabled, data read from &amp;0000-&amp;3FFF will return the data in the RAM.
Similarly, bit 3 controls enabling or disabling of the upper ROM area. The upper ROM area occupies memory addressess &amp;C000-&amp;FFFF and is BASIC or any expansion ROMs which may be plugged into a ROM board/box. See the document on [[Upper ROM Bank Number|upper rom selection]] for more details. When the upper ROM area enabled, reading from &amp;c000-&amp;ffff, will return data in the ROM. When data is written to &amp;c000-&amp;FFFF, it will be written to the RAM at the same address as the ROM. When the upper ROM area is disabled, and data is read from &amp;c000-&amp;ffff it will be the data in the RAM.
Bit 4 controls the interrupt generation. It can be used to delay interrupts. See the document on interrupt generation for more information.
==== Summary ====
| 5 || 1
|-
| 4 || x || rowspan="2" |Lower ROM address and ASIC I/O page RMR addressing mode
|-
| 3 || x
|}
The lower {| class="wikitable"|+ RMR addressing modes!Bit 4!Bit 3!Lower ROM address and ![[Default I/O Port SummaryASIC|ASIC I/O page]] modes are:  |-Mode- ROM address ASIC I/O Page 00 |0|0|&0000-&3FFF |Disabled 01 |-|0|1|&4000-&7FFF |Disabled 10 |-|1|0|&8000-&BFFF |Disabled 11 |-|1|1|&0000-&3FFF |&4000-&7fff7FFF|}
The physical ROMs are also accessible as upper ROMs by using the [[Upper ROM Bank Number]] port and the RMR register.
This register exists only in CPCs with 128K RAM (like the CPC 6128), or CPCs equipped with [[Standard Memory Expansions]].
Note: In the CPC 6128, the register is a separate [[PAL16L8|PAL chip]] that assists the Gate Array chip. See its wiki page.
{| class="wikitable"
<br>
=== Palette sorted by Hardware Firmware Colour Numbers === The firmware colour palette is sorted by luminance value.
{| class="wikitable"
|-
|-
!Hardware Number
!Firmware Number
!Hardware Number
!Colour Name
!R %
!Colour
|-
| 0 (40h) || 13 54h || White Black || 50 0|| 50 0|| 50 0|| #666000|| bgcolor="#808080000000" |
|-
| 1 (41h) || 44h (13or 50h) || White Blue || 50 0|| 50 0|| 50|| #666006|| bgcolor="#808080000080" |
|-
| 2 (42h) || 19 55h || Sea Green Bright Blue || 0||100 0|| 50100|| #0F600F|| bgcolor="#00ff800000ff" |
|-
| 3 (43h) || 25 5Ch || Pastel Yellow Red ||10050||100 0|| 50 0|| #FF6600|| bgcolor="#ffff80800000" |
|-
| 4 (44h) || 1 58h || Blue Magenta || 050|| 0|| 50|| #006606|| bgcolor="#000080800080" |
|-
| 5 (45h) || 7 5Dh || Purple Mauve ||10050|| 0|| 50100|| #F0660F|| bgcolor="#ff00808000ff" |
|-
| 6 (46h) || 10 4Ch || Cyan Bright Red ||100|| 0|| 50|| 50 0|| #066F00|| bgcolor="#008080ff0000" |
|-
| 7 || 45h (47hor 48h) || 16 || Pink Purple ||100|| 50 0|| 50|| #F66F06|| bgcolor="#ff8080ff0080" |
|-
| 8 (48h) || (7) 4Dh || Purple Bright Magenta ||100|| 0|| 50100|| #F06F0F|| bgcolor="#ff0080ff00ff" |
|-
| 9 (49h) || (25) 56h || Pastel Yellow Green ||100 0||10050|| 50 0|| #FF6060|| bgcolor="#ffff80008000" |
|-
| 10 (4Ah) || 24 46h || Bright Yellow Cyan ||100 0||10050|| 050|| #FF0066|| bgcolor="#ffff00008080" |
|-
| 11 (4Bh) || 26 57h || Bright White Sky Blue ||100 0||10050||100|| #FFF06F|| bgcolor="#ffffff0080ff" |
|-
| 12 (4Ch) || 6 5Eh || Bright Red Yellow ||10050|| 050|| 0|| #F00660|| bgcolor="#ff0000808000" |
|-
| 13 (4Dh) || 8 40h (or 41h) || Bright MagentaWhite ||10050|| 050||10050|| #F0F666|| bgcolor="#ff00ff808080" |
|-
| 14 (4Eh) || 15 5Fh || Orange Pastel Blue ||10050|| 50|| 0100|| #F6066F|| bgcolor="#ff80008080ff" |
|-
| 15 (4Fh) || 17 4Eh || Pastel MagentaOrange ||100|| 50||100 0|| #F6FF60|| bgcolor="#ff80ffff8000" |
|-
| 16 (50h) || (1) 47h || Blue Pink || 0100|| 050|| 50|| #006F66|| bgcolor="#000080ff8080" |
|-
| 17 (51h) || (19) 4Fh || Sea Green || 0Pastel Magenta ||100|| 50||100|| #0F6F6F|| bgcolor="#00ff80ff80ff" |
|-
| 18 (52h) || 18 52h || Bright Green || 0||100|| 0|| #0F0|| bgcolor="#00ff00" |
|-
| 19 || 42h (53hor 51h) || 20 || Bright Cyan Sea Green || 0||100||10050|| #0FF0F6|| bgcolor="#00ffff00ff80" |
|-
| 20 (54h) || 0 53h || Black Bright Cyan || 0|| 0100|| 0100|| #0000FF|| bgcolor="#00000000ffff" |
|-
| 21 (55h) || 2 5Ah || Bright Blue Lime || 050||100|| 0||100|| #00F6F0|| bgcolor="#0000ff80ff00" |
|-
| 22 (56h) || 9 59h || Pastel Green || 050|| 50100|| 050|| #0606F6|| bgcolor="#00800080ff80" |
|-
| 23 (57h) || 11 5Bh || Sky Blue Pastel Cyan || 050|| 50100||100|| #06F6FF|| bgcolor="#0080ff80ffff" |
|-
| 24 (58h) || 4 4Ah || Magenta Bright Yellow || 50100|| 0100|| 50 0|| #606FF0|| bgcolor="#800080ffff00" |
|-
| 25 || 43h (59hor 49h) || 22 || Pastel Green Yellow || 50100||100|| 50|| #6F6FF6|| bgcolor="#80ff80ffff80" |
|-
| 26 (5Ah) || 21 || Lime 4Bh || 50||100|| 0|| #6F0|| bgcolor="#80ff00" | |-| 27 (5Bh) || 23 Bright White || Pastel Cyan || 50||100||100|| #6FF|| bgcolor="#80ffff" | |-| 28 (5Ch) || 3 || Red || 50|| 0|| 0|| #600||bgcolor="#800000" | |-| 29 (5Dh) || 5 || Mauve || 50|| 0||100|| #60F||bgcolor="#8000ff" | |-| 30 (5Eh) || 12 || Yellow || 50|| 50|| 0|| #660||bgcolor="#808000" | |-| 31 (5Fh) || 14 || Pastel Blue || 50|| 50||100|| #66FFFF||bgcolor="#8080ffffffff" |
|}
 
Note: We can observe that the official Amstrad names of some colours are a bit silly: "red" is in fact brown, "yellow" is in fact khaki and "white" is in fact grey.
<br>
=== Intensities Amstrad Colour Names ===
The 0%, 50%, and 100% values in the above tables are "should-be" values. However, the real hardware doesn't exactly match that intensities. The actual intensities depend on the luminance mixing (R,G,B tied together via resistors), on chipset (classic CPC, or newer ASIC ones), and on the load applied by external hardware (Monitor, or TV set).<gallery>On an actual Amstrad CPC, the half-intensity Cpc 6128 master colour signal is measured to be closer to 40% rather than the expected 50%chat. This was verified by Grim and independently confirmed by Nocash. [https://www.grimware.org/doku.php/documentations/devices/gatearray#inkr Source]* [[CPC Palette]] - some more details This explains why the Amstrad engineers used the following values to adapt the old jpg|Master colour palette to the new 12-bit palette on the Amstrad Plus:chart* 0% became #0Cpc 6128 farbtabelle.jpg|Farbtabelle* 50% became #6. They specifically chose #6 for the 50% value instead of the expected #7 or #8, to better match the real Amstrad CPC Cpc 6128 palettedes couleurs.jpg|Palette des couleurs* 100% became #FCpc 6128 tabla de colores.jpg|Tabla de colores</gallery>
<br>
=== Palette sorted by Firmware Hardware Colour Numbers === The firmware colour palette is sorted by luminance value.
{| class="wikitable"
|-
|-!Hardware Number
!Firmware Number
!Hardware Number
!Colour Name
!R %
!G %
!ASIC
!Colour
!Colour Name
!German Name
!French Name
!Spanish Name
|-
| 0(40h) || 54h 13 ||Black 50|| 050|| 0|| 050|| #000666||bgcolor="#000000808080"||| White || Weiß || Blanc || Blanco
|-
| 1(41h) || 44h (or 50h13) ||Blue 50|| 0|| 050|| 50|| #006666||bgcolor="#000080808080"||| White || Weiß || Blanc || Blanco
|-
| 2(42h) || 55h ||Bright Blue 19 || 0|| 0100||10050|| #00F0F6||bgcolor="#0000ff00ff80"||| Sea Green || Seegrün || Vert marin || Verde marino
|-
| 3(43h) || 5Ch 25 ||Red 100|| 50100|| 0|| 050|| #600FF6||bgcolor="#800000ffff80"||| Pastel Yellow || Pastellgelb || Jaune pastel || Amarillo pastel
|-
| 4(44h) || 58h 1 ||Magenta || 50 0|| 0|| 50|| #606006||bgcolor="#800080000080"||| Blue || Blau || Bleu || Azul
|-
| 5(45h) || 5Dh 7 ||Mauve || 50100|| 0||10050|| #60FF06||bgcolor="#8000ffff0080"||| Purple || Purpur || Pourpre || Púrpura
|-
| 6(46h) || 4Ch ||Bright Red ||10010 || 0|| 050|| 50|| #F00066||bgcolor="#ff0000008080"||| Cyan || Blaugrün || Turquoise || Ciano
|-
| 7|| 45h (or 48h47h) ||Purple 16 ||100|| 050|| 50|| #F06F66||bgcolor="#ff0080ff8080"||| Pink || Rosa || Rose || Rosa
|-
| 8(48h) || 4Dh ||Bright Magenta (7) ||100|| 0||10050|| #F0FF06||bgcolor="#ff00ffff0080"||| Purple || Purpur || Pourpre || Púrpura
|-
| 9(49h) || 56h (25) ||Green 100|| 0100|| 50|| 0|| #060FF6||bgcolor="#008000ffff80"||| Pastel Yellow || Pastellgelb || Jaune pastel || Amarillo pastel
|-
|10(4Ah) || 46h 24 ||Cyan 100||100|| 0|| 50|| 50|| #066FF0||bgcolor="#008080ffff00"||| Bright Yellow || Hellgelb || Jaune vif || Amarillo brillante
|-
|11(4Bh) || 57h 26 ||Sky Blue 100|| 0|| 50100||100|| #06FFFF||bgcolor="#0080ffffffff"||| Bright White || Leuchtendweiß || Blanc brillant || Blanco brillante
|-
|12(4Ch) || 5Eh 6 ||Yellow 100|| 50|| 50 0|| 0|| #660F00||bgcolor="#808000ff0000"||| Bright Red || Hellrot || Rouge vif || Rojo brillante
|-
|13|| 40h (or 41h4Dh) ||White 8 || 50100|| 50 0|| 50100||#666F0F||bgcolor="#808080ff00ff"||| Bright Magenta|| helles Magenta || Magenta vif || Magenta brillante
|-
|14(4Eh) || 5Fh 15 ||Pastel Blue 100|| 50|| 50||100 0|| #66FF60||bgcolor="#8080ffff8000"||| Orange || Orange || Orange || Naranja
|-
|15(4Fh) || 4Eh ||Orange 17 ||100|| 50|| 0100|| #F60F6F|| bgcolor="#ff8000ff80ff"||| Pastel Magenta|| Pastell-magenta || Magenta pastel || Magenta pastel
|-
|16(50h) || 47h (1) ||Pink 0||100|| 50 0|| 50|| #F66006||bgcolor="#ff8080000080"||| Blue || Blau || Bleu || Azul
|-
|17(51h) || 4Fh (19) ||Pastel Magenta 0||100|| 50||100|| #F6F0F6||bgcolor="#ff80ff00ff80"||| Sea Green || Seegrün || Vert marin || Verde marino
|-
|18|| (52h ) ||Bright Green 18 || 0||100|| 0|| #0F0||bgcolor="#00ff00"||| Bright Green || Hellgrün || Vert vif || Verde brillante
|-
|19|| 42h (or 51h53h) ||Sea Green 20 || 0||100|| 50100|| #0F60FF||bgcolor="#00ff8000ffff"||| Bright Cyan || helles Blaugrün || Turquoise vif || Ciano brillante
|-
|20(54h) || 53h ||Bright Cyan 0 || 0||100 0||100 0|| #0FF000||bgcolor="#00ffff000000"||| Black || Schwarz || Noir || Negro
|-
|21(55h) || 5Ah 2 ||Lime 0|| 50 0||100|| 0|| #6F000F||bgcolor="#80ff000000ff"||| Bright Blue || Hellblau || Bleu vif || Azul brillante
|-
|22(56h) || 59h 9 ||Pastel Green 0|| 50||100|| 50 0|| #6F6060||bgcolor="#80ff80008000"||| Green || Grün || Vert || Verde
|-
|23(57h) || 5Bh 11 ||Pastel Cyan 0|| 50||100||100|| #6FF06F||bgcolor="#80ffff0080ff"||| Sky Blue || Himmelblau || Bleu ciel || Azul cielo
|-
|24(58h) || 4Ah 4 ||Bright Yellow ||100||10050|| 0|| 50|| #FF0606||bgcolor="#ffff00800080"||| Magenta || Magenta || Magenta || Magenta
|-
|25(59h) || 22 || 50||100|| 50|| #6F6|| bgcolor="#80ff80" | || Pastel Green || Pastellgrün || Vert pastel || Verde pastel|-| 43h 26 (or 49h5Ah) ||Pastel Yellow 21 || 50||100|| 0|| #6F0|| bgcolor="#80ff00" | || Lime || Limonengrün || Vert citron || Verde lima|-| 27 (5Bh) || 23 || 50||100||100|| #6FF|| bgcolor="#80ffff" | || Pastel Cyan || Pastell-blaugrün|| Turquoise pastel|| Ciano pastel|-| 28 (5Ch) || 3 || 50|| 0|| 0||#FF6600||bgcolor="#ffff80800000"||| Red || Rot || Rouge || Rojo|-| 29 (5Dh) || 5 || 50|| 0||100|| #60F|| bgcolor="#8000ff" | || Mauve || Hellviolett || Mauve || Malva|-| 30 (5Eh) || 12 || 50|| 50|| 0|| #660|| bgcolor="#808000" | || Yellow || Gelb || Jaune || Amarillo
|-
|2631 (5Fh) || 4Bh ||Bright White 14 ||10050||10050||100|| #FFF66F||bgcolor="#ffffff8080ff"||| Pastel Blue || Pastellblau || Bleu pastel || Azul pastel
|}
 
Note: We can observe that the official Amstrad names of some colours are a bit silly: "red" is in fact brown, "yellow" is in fact khaki and "white" is in fact grey.
<br>
=== Green Screen Colours Intensities ===
On a green screenThe 0%, where all colours 50%, and 100% values in the above tables are shades of unsaturated green"should-be" values. However, the colours real hardware doesn't exactly match that intensities. The actual intensities depend on the luminance mixing (in BASIC coloursR,G,B tied together via resistors) are in order of increasing intensity. Black is darkest green, white is brightest greenon chipset (classic CPC, or newer ASIC ones), and colour 13 is a medium greenon the load applied by external hardware (Monitor, or TV set).
The luminance (Y) On an actual Amstrad CPC, the half-intensity colour signal is not exactly correlated measured to be closer to 40% rather than the actual luminance of colour images broadcast in RGBexpected 50%. This was verified by [[Grim]] and independently confirmed by [[Nocash]]. [https://www.grimware. We have other valuesorg/doku.php/documentations/devices/gatearray#inkr Source]* [[CPC Palette]] - some more details
This explains why the Amstrad preferred engineers used the following values to propose a completely different image system, not comparable to a conversion to monochrome, which would have limited adapt the number of brightness levels old colour palette to 21 (for example, colours 9 and 6 would have had the same luminance).new 12-bit palette on the Amstrad Plus:* 0% became #0* 50% became #6. They opted specifically chose #6 for a table the 50% value instead of 27 linear brightness steps. They assigned values of 1 (1kΩ) for bluethe expected #7 or #8, 3 (3.3kΩ) for red, and 9 (10kΩ) for greento better match the real Amstrad CPC palette.* 100% became #F
<br>
=== To calculate the luminance value Green Screen Colours ===
'''Red''' On a green screen, where all colours are shades of unsaturated green, the firmware colours are in order of increasing intensity. Black is darkest green, bright white is brightest green, and firmware colour 13 is a medium green.
0% =&gt; do The luminance (Y) is not add anything exactly correlated to the actual luminance of colour images broadcast in RGB. Amstrad preferred to propose a completely different image system, not comparable to a conversion to monochrome, which would have limited the number of brightness levels to 21 (for example, colours 9 and 6 would have had the same luminance).
50% =&gt; add They opted for a table of 27 linear brightness steps. They assigned values of 1 (1kΩ) for blue, 3 (3.3kΩ) for red, and 9 (10kΩ) for green.
100% =&gt; add 6 === To calculate the luminance value ====
'''GreenRed'''
*0% =&gt; do not add anything *50% =&gt; add 3 *100% =&gt; add 6
50% =&gt; add 9 '''Green'''
*0% =&gt; do not add anything *50% =&gt; add 9 *100% =&gt; add 18
'''Blue'''
*0% =&gt; do not add anything  *50% =&gt; add 1  *100% =&gt; add 2
<br>
== External links ==
*[https://bread80.com/2021/06/03/understanding-the-amstrad-cpc-video-ram-and-gate-array-subsystem/ Electronic signals analysis of the Gate Array by Bread80]
* [https://shaker.logonsystem.eu/ACCC1.8-EN.pdf Gate Array documentation in Amstrad CRTC Compendium]
* [https://www.grimware.org/doku.php/documentations/devices/gatearray Gate Array documentation from Grimware]
* [http://quasar.cpcscene.net/doku.php?id=assem:gate_array Quasar Gate Array documentation (in french)]
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